How are the processor's bit depth, the bit depth of its registers, the size of the addressable memory, and how does all this affect performance?
I study computer architecture from books Tannenbaum and Harris.
I still don't understand many seemingly simple things. There are many questions, but almost all of them are somehow related to the machine word. This is the most incomprehensible topic for me.
I want to make a reservation that I understand that there is a direct relationship between the processor bit rate, the register bit rate, the size of the addressable memory and the speed of the computer. I don't understand why.
- How the processor's bit depth affects its performance. Sort of 64-bit is faster than 32-bit. But why? I do not understand. Here is an example: The command system for MIPS-32 processors. After all, the command architecture itself is such that all commands are removed in 32 bits. That is, if you make 64 bits, the higher 32 bits will simply have to be filled with zeros. And what, the processor will become faster from this?
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From Wikipedia:
Processor bit depth (its bit depth machine word). Machine word - a machine-dependent and platform-dependent value, measured in bits or bytes (trits or trits), equal to the bit depth of the registers.
Why does the machine word have to be equal to the bit depth of the registers? Why can't we read data 64 bits at a time? 16-bit registers, for example?
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Now about the memory. Again from Wikipedia:
A 64-bit register can store one of 264 = 18,446 744 073 709,551,616 values. A processor with 64-bit memory addressing can directly access 16 EB of memory.
I understand that the amount of memory depends on the address the number of bits in the address. But again, how does this relate to registers? I see only one connection: if we are going to store addresses in registers, then the registers must have the same bit depth as the addresses. But is it necessary to store addresses in registers?
- About the bit depth of the OS, I seem to understand, but I wanted to I would like to clarify. As I understand it, the OS is related to all this like this: a 64-bit OS runs on a 64-bit processor, a 32-bit one runs on a 32 - bit one. That is, with the advent of the 64-bit processor, it was inevitable that 64-bit OS. Do I understand this correctly?
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And here the question is rather historical, but also very important for me. I always thought that the 64-bit processor appeared recently and it was presented as a big breakthrough. And on Wikipedia, here's what it says:
The requirements for the accuracy of scientific calculations increased, and in 1974 the first machine with a 64-bit word appeared - the Cray-1 supercomputer
What was the difficulty in creating a 64-bit processor? And what is the difficulty now to create, for example, a 128-bit processor? What does it depend on? What determines it? The bit depth of the registers? And what is the difficulty of increasing the bit depth of registers? What determines it?
3 answers
The main job of the processor is not to transmit information, but to transform it. The register is the same RAM, but from which there is a direct wiring to a bunch of executing devices that perform arithmetic and other actions with data. There are a lot of these lines being made. Each bit of the register will have its own and large set of transistors for performing specific operations. Hence the difficulty of increasing the number of digits. With the growth of the register dimension by 2 times as the minimum is doubled and the volume of all executing devices is doubled. the crystal grows, the heat generation grows.
Look at the command system, any data transformations require the participation of at least one register. And some of the operations occur exclusively in registers. In the x86 architecture, you can add memory to the register. But for example, you can't shift or multiply a memory cell. it is impossible to add the values of two memory cells without first taking one of them into the register. because the executive the mechanism of this operation has direct wiring only with the register.
In: Why can't we read data 64 bits at a time with 16-bit registers
We can, but where to read it and why ? In general, modern processors do this, fill the internal cache and operate at the same time with the bit depth of the bus, registers are not involved here. We read 64 bits in the cache, and now we need to multiply them by 3, for example. And we have a 16-bit register, how to multiply ? That's right, in parts, applying a bunch of extra transformations and spending precious clock cycles on it. Therefore, the dimension of the transmission bus is secondary. The main thing is the bit depth of the register. And it was called a machine word.
In: But is it necessary to store addresses in registers?
Yes, absolutely. The processor somehow needs to be told-take the data there. And where is it ? In memory ? And then what will the instructions look like-take the address located at the address, at that address lying in the instructions ... And if we need to work in a row with a block of data (we are processing an array in a loop) and this address needs to be increased (i.e., perform addition, which we can only do in a register)
By the way, the bit depth of the command and the bit depth of the processor are different things. MIPS packed all the commands into 32 bits. And the x86 platform from time immemorial has been with variable-bit operations. from short single-byte ones, to long monsters with a bunch of prefixes. Processor bit rate = bit rate register = the maximum size of the information processed by a single instruction (in normal commands, which make up the main code, we do not take any SSE).
Performance - who said that bit depth plays a key role. Yes, the bit depth is affected. The boom in 64-bit processors and OSS is a great example of marketing. 64-bit code is often slower than 32-bit code. If the program does not need to address more than 4 GB of memory, and its code stores 64-bit addresses , then the program size is 2 times more. Larger size means longer read time in the cache. Requires more memory. The race for gigabytes of RAM begins ... Now even the reverse process has begun. the x32 ABI is fully developed - the operation of 32-bit code in 64-bit mode.
But let's take RSA encryption, which is used in the same ubiquitous SSL. It requires complex calculations with very large numbers. Let's assume that we don't have specialized processor instructions for it. Of course if the processor operates 64 with bit registers, it will perform the calculation 2 times faster, simply because it is able to process 2 times more information in one clock cycle. Yes, on computational problems with large numbers, the gain from increasing the bit depth is difficult to overestimate.
In: A 64-bit OS runs on a 64-bit processor, while a 32-bit OS runs on a 32 - bit processor.
No, a 64-bit OS consists of 64-bit code capable of addressing memory with 64-bit addresses. Of course she can do it only on a 64-bit processor. The appearance of the wasps was of course inevitable. Although here marketing played a significant role. 90% of people who understand computers believe that to address more than 4 GB of RAM on the intel platform, you need a 64-bit OS. Yes, this restriction was forcibly introduced in Windows. Intel processors in 32-bit mode PAE address up to 64 GB of RAM, while one process is limited to 4 GB. 32-bit linux feels great with such volumes.
By about the history and complexity of building 128-bit registers ... the only question is the price. Yes, on some non-mass market systems, this was done a long time ago, it was not necessary on the mass market, so it did not appear. And then it cost fabulously, because as we said at the beginning-each bit of the register is a bunch of executing devices, and with those production technologies, it was, let's say, difficult to place so many transistors on the chip. Full-fledged 128-bit processors are simply not needed, especially for mass market, address more than 64 EB of memory, where else to find it. In general, now all intel processors have 16 SSE registers with a size of 128 bits, these are not general-purpose registers, they are for calculations. And on modern Xeon, designed for serious computing, 32 ZMM registers of 512 bits (see AVX)...
I see only one connection: if we are going to store addresses in registers, then the registers must have the same bit depth as the addresses.
To confuse you completely: You shouldn't.
For example, eight-bit processors can address 16 bits: the memory access instruction selects an address not from a register, but from a register pair. The 8086 processor with 16-bit registers can address 20 bits (базовый регистр регистр смещения).
The mentioned Cray-1 had 64-bit data registers and 24-bit address registers.
Everything is relative.
For example, parallelization of algorithms can win on processors with multiple cores, but only if the algorithm can be parallelized. I.e., if the task can be divided into two parallel threads.
So it is with the processor bit rate. If the algorithm can be optimized for large registers, then yes, it will run faster on x86_64 than on i386.
But if the algorithm itself is not optimized and its speed is not it depends on the size of the register - then you will not get any acceleration.